Hello, I need to get a (rough) estimation of the number of clock cycles for a program I wrote. The program is mainly composed of XOR and 1 bit-leftshift on 1024 bits words.

Here is the code in C:

--------------------

#define UL unsigned long
typedef UL BIGINT[32]; // a[0] is the less significant word (little endian)

int shiftleft(UL* res, UL* a)
// res:=a<<1; (MSB is lost, but the function returns it)
// Return 1 if there is a carry, 0 otherwise
//
{
int i;
UL c=0;

for (i=0;i<32;i++)
{
res[i]=(a[i]<<1)|c;
c=(a[i]&0x80000000)>>31;
}
return c;
}

void xor(UL* res, UL* a, UL* b)
// res=a XOR b
{
int i;

for (i=0;i<32;i++) res[i]=a[i]^b[i];
}

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How can I translate this in assembler?
How many clock cycles do I need in each loop?
Whic influence may pipelining have on the number of clock cycles needed to execute the program?